1. Field of the Invention
This invention relates to a novel semiconductor device for use in semiconductor random access memories and means for selecting a particular device from a plurality of such devices for the purpose of recalling data from the selected device, storing data in the selected device, or both.
2. Description of the Prior Art
The cost of manufacturing integrated circuit semiconductor memories decreases as the amount of processing required in the manufacture of the memory decreased, and decreases as the size of the semiconductor surface area required per stored bit decreases. In the past integrated circuit semiconductor memories have been manufactured using either charge control devices (CCDs), or metal-insulator-semiconductor field effect transistors (MISFETs), or bipolar transistors, or a combination of the above devices. Semiconductor memories which utilize charge control devices for the storing of binary data usually require less processing in their manufacture and require less semiconductor surface area per stored bit then do semiconductor memories which utilize either MISFETs or bipolar transistors for the storage of binary data. In the past, only the shift register (SR), also known as a serial register, type of memories have been manufactured using CCDs. A disadvantage of SR memories compared to random access type memories (RAMs) is that SR memories usually require either more extensive support circuitry, or more complex support circuitry, or both, than RAMs do. Also, due to the serial organization of data stored in SRs, in some applications, the time interval between the request for a particular bit of stored data and the appearance of the data at the output terminals of the memory will be delayed by the requirement to shift a significent amount of the data stored in the SR. Another disadvantage of using CCDs in SR memories is that during charge transfer, a fraction of the charge in each CCD may not be transferred to the succeeding CCD, and as a consequence the signal is degraded during every charge transfer. Therefore the number of CCDs in a single SR is limited. Another disadvantage of CCDs is that in one embodiment they require three surface electrodes, which with the limitations on electrode size due to limits on the photolithographic process, requires a large amount of semiconductor surface area. Such CCDs also require a three phase clock signal which necessitates additional circuitry and may limit the speed of operation of the SR. Alternative embodiments of CCDs used in SRs require fewer electrodes and less complex clock signals, but such embodiments have the disadvantage of a more complex geometry and reduced performance in comparison to three electrode CCDs.
High density RAMs which use either MISFETs only, or which use MISFETs and other electronic devices such as capacitors, often have the disadvantage that the operation of recalling data from a particular cell destroys the data which was being maintained in that cell.